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RFID Wedding Invitation

We created a hardware and software system in which guests are able to check into the wedding and learn their seating arrangement with their wedding invitation. The guests will scan their wedding invitation, which is equipped with an RFID tag, on the Arduino system. The program creates the executable file that initiates our hardware to scan the ID of the RFID tag. RGB light and speaker in the Arduino signals the user once the tag is correctly scanned. Once scanned, the ID is searched and matched to the table (seat) ID in the database. The program interface displays a specific seating of the guest. Each interface matches the table theme (game characters).

Inputbot

Automate inputs to expand computer use for disabled people.

Custom RISC CPU, Assembler, and Simulator

In a collaboration for CSE 443 Compilers and CSE 490 Computer Architecture, the reduced instruction set architecture Smallpond has been born, and a toolchain for the ISA has been built. It has now been implemented on the Digilent Basys 3 FPGA development board with gdb debug, and a flexible assembler and simulator framework has been written in Java which allows for quick changes to the ISA. In fact, with the redefinition of a few classes, an entirely new ISA can be created and simulated with this Java program. Features of the processor: gdb-like debug, memory mapped IO, UART connectivity, interesting special purpose registers.

DistrOS

A ubiquitous, distributed operating system with single system image, making it appear to the user that all networked compute devices are one resource pool, for RISC-V. The OS will optimize certain operations for RISC-V cores (heterogeneous computing).